Commit Graph

41 Commits

Author SHA1 Message Date
Pawel Spychalski
3778fcd0cd Callback for QSP decoding 2017-11-16 16:12:20 +01:00
Pawel Spychalski
9d609dfa77 RX outout table moved to RxDeviceState object 2017-11-16 13:31:29 +01:00
Pawel Spychalski (DzikuVx)
36dc76db0d Reworked radio handling to early reject false packets 2017-11-15 18:53:31 +01:00
Pawel Spychalski (DzikuVx)
d322447290 Updated radio properties 2017-11-11 19:50:38 +01:00
Pawel Spychalski (DzikuVx)
8fc8c20697 All processing moved from ISR to main loop 2017-11-11 16:51:00 +01:00
Pawel Spychalski (DzikuVx)
1a031aba3f Fixed bug thata was failing to process frames without preamble 2017-11-09 19:52:52 +01:00
Pawel Spychalski
1057c0995c protocol preamble removed as not required for LoRa packet processing 2017-11-09 14:56:59 +01:00
Pawel Spychalski (DzikuVx)
34b7a42b85 slower transmission 2017-10-29 15:25:36 +01:00
Pawel Spychalski (DzikuVx)
b7782db478 Audible alarms on TX side 2017-10-29 13:08:39 +01:00
Pawel Spychalski (DzikuVx)
86c7c3af0a Small optimization 2017-10-29 09:56:06 +01:00
Pawel Spychalski (DzikuVx)
74cb084017 Basic buzzer framework 2017-10-28 19:35:06 +02:00
Pawel Spychalski (DzikuVx)
6277d4cec9 Code cleanup 2017-10-27 13:44:01 +02:00
Pawel Spychalski (DzikuVx)
0f735f0054 close #23 2017-10-27 11:25:48 +02:00
Pawel Spychalski (DzikuVx)
86f70accff TX module is no longer using interrupts to read from LoRa. This fixes jumpy PPM readouts 2017-10-27 07:20:43 +02:00
Pawel Spychalski (DzikuVx)
9ea446de79 Slots for transmitting on RX side close #8 2017-10-26 20:03:20 +02:00
Pawel Spychalski (DzikuVx)
9e0f425ee9 Sloted approach on TX side 2017-10-26 16:16:21 +02:00
Pawel Spychalski (DzikuVx)
a800031b0a close #15 2017-10-26 13:51:34 +02:00
Pawel Spychalski (DzikuVx)
429d808fa2 close #10 2017-10-25 21:18:01 +02:00
Pawel Spychalski (DzikuVx)
8f194e3968 close #18 2017-10-25 20:21:13 +02:00
Pawel Spychalski
4e53ebde9c updated sbus rate 2017-10-25 10:59:06 +02:00
Pawel Spychalski (DzikuVx)
a6b5946a68 close #12 2017-10-24 21:08:04 +02:00
Pawel Spychalski (DzikuVx)
b1c3b36b7c close #20 2017-10-24 20:09:43 +02:00
Pawel Spychalski (DzikuVx)
2a47aac573 close #19 close #13 2017-10-24 20:07:23 +02:00
Pawel Spychalski (DzikuVx)
474d2a9c84 It works. More less 2017-10-23 21:16:48 +02:00
Pawel Spychalski (DzikuVx)
d0120405fb close #17 2017-10-23 19:37:13 +02:00
Pawel Spychalski (DzikuVx)
974a31ad61 Fixed missing constrain 2017-10-23 19:24:50 +02:00
Pawel Spychalski (DzikuVx)
1d16fdd052 close #9 2017-10-23 12:51:05 +02:00
Pawel Spychalski (DzikuVx)
471e532c5a close #16 2017-10-23 12:45:25 +02:00
Pawel Spychalski (DzikuVx)
0a1b5feecd close #1 2017-10-22 20:14:28 +02:00
Pawel Spychalski (DzikuVx)
08b16b4cea close #6 2017-10-22 11:56:17 +02:00
Pawel Spychalski (DzikuVx)
779b64189a close #2 2017-10-22 09:31:46 +02:00
Pawel Spychalski (DzikuVx)
d790d087fe Fixed debug flags 2017-10-20 23:06:14 +02:00
Pawel Spychalski (DzikuVx)
810abc14eb Fixed SPI mode with LoRa32u4 II 2017-10-20 22:47:46 +02:00
Pawel Spychalski
021decff98 Rx_health frame encoding, no data is yet acquired from Rx hardware 2017-10-12 13:29:10 +02:00
Pawel Spychalski
0071b7880f Store last time frame was received 2017-10-12 10:45:14 +02:00
Pawel Spychalski
ff2f0f710a RX failsafe with pulling PPM output LOW 2017-10-11 14:40:17 +02:00
Pawel Spychalski (DzikuVx)
01836b8657 another small refactoring 2017-10-07 19:06:07 +02:00
Pawel Spychalski (DzikuVx)
022f186175 quite major overhaul 2017-10-07 18:57:13 +02:00
Pawel Spychalski
3395587580 Defines refactoring 2017-10-06 13:47:42 +02:00
Pawel Spychalski
1632baccc8 Temprary table used during PPM decoding 2017-10-05 09:43:59 +02:00
Pawel Spychalski
2559bd8bc2 some more work 2017-09-28 13:17:01 +02:00