Pawel Spychalski
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948cc7915b
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RadioState removed
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2018-05-16 13:36:22 +02:00 |
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Pawel Spychalski
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0079264128
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step 3
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2018-05-16 13:07:12 +02:00 |
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Pawel Spychalski
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3766948329
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step 2
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2018-05-16 11:41:06 +02:00 |
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Pawel Spychalski (DzikuVx)
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fba208adc9
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Merge branch 'master' into oled-framework
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2018-05-15 17:53:49 +02:00 |
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Pawel Spychalski (DzikuVx)
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ab5806bf53
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do not store pointers, this just do not work
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2018-05-15 17:44:50 +02:00 |
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Pawel Spychalski
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33e11a64b5
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VScode properties change
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2018-05-15 14:05:09 +02:00 |
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Pawel Spychalski
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0c6017122a
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Basic OLED
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2018-05-15 14:03:43 +02:00 |
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Pawel Spychalski (DzikuVx)
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94875b94e5
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vscode bump
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2018-05-14 16:56:52 +02:00 |
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Pawel Spychalski (DzikuVx)
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3ea77891f1
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TX module LED indication
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2018-04-27 23:05:44 +02:00 |
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Pawel Spychalski (DzikuVx)
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14d8215543
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Fixed bind key crc salting
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2018-04-27 22:03:20 +02:00 |
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Pawel Spychalski (DzikuVx)
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12e2bca441
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Fixed current channel indication and next channel computation
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2018-04-19 12:49:40 +02:00 |
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Pawel Spychalski (DzikuVx)
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b6814509a2
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Merge branch 'master' into feature/frequency-hopping
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2018-04-19 11:51:35 +02:00 |
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Pawel Spychalski (DzikuVx)
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66693914d1
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improed processing of sbus frames
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2018-04-19 11:18:36 +02:00 |
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Pawel Spychalski
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f1e659bfd0
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Happy path frequency hopping
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2018-04-10 15:01:27 +02:00 |
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Pawel Spychalski
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db1cd344cb
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some config optimizations
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2018-04-10 08:53:15 +02:00 |
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Pawel Spychalski (DzikuVx)
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b38dc15ba5
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changed default input protocol
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2018-04-02 20:52:56 +02:00 |
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Pawel Spychalski (DzikuVx)
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365df5b269
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Improved failsafe state detection when TX module is not receiving input
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2018-01-03 19:41:59 +01:00 |
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Pawel Spychalski (DzikuVx)
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cb3c510815
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Further changes to async processing
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2018-01-02 21:14:11 +01:00 |
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Pawel Spychalski (DzikuVx)
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8dfc41759e
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Another compiler warning fiuxed
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2018-01-02 20:14:41 +01:00 |
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Pawel Spychalski (DzikuVx)
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8071d6ac74
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Fixed compiler warnings
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2017-12-28 12:05:18 +01:00 |
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Pawel Spychalski (DzikuVx)
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50e297b3d6
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Packet reading is now down in single SPI transaction
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2017-12-14 23:41:14 +01:00 |
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Pawel Spychalski
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8ffaccbd5f
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TX power moved to configuration
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2017-11-23 14:41:11 +01:00 |
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Pawel Spychalski (DzikuVx)
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36dc76db0d
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Reworked radio handling to early reject false packets
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2017-11-15 18:53:31 +01:00 |
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Pawel Spychalski (DzikuVx)
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6082f7f4a7
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task priority changed
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2017-11-11 14:09:14 +01:00 |
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Pawel Spychalski (DzikuVx)
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1a031aba3f
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Fixed bug thata was failing to process frames without preamble
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2017-11-09 19:52:52 +01:00 |
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Pawel Spychalski (DzikuVx)
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a800031b0a
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close #15
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2017-10-26 13:51:34 +02:00 |
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Pawel Spychalski (DzikuVx)
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471e532c5a
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close #16
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2017-10-23 12:45:25 +02:00 |
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Pawel Spychalski (DzikuVx)
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810abc14eb
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Fixed SPI mode with LoRa32u4 II
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2017-10-20 22:47:46 +02:00 |
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Pawel Spychalski (DzikuVx)
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5b5ca9fedf
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methods to read RSSI and SNR
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2017-10-07 12:10:15 +02:00 |
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Pawel Spychalski
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3395587580
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Defines refactoring
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2017-10-06 13:47:42 +02:00 |
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Pawel Spychalski (DzikuVx)
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4bc7668ae9
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Support for SPI connected SX1278
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2017-09-30 18:43:03 +02:00 |
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Pawel Spychalski
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2559bd8bc2
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some more work
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2017-09-28 13:17:01 +02:00 |
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Pawel Spychalski (DzikuVx)
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458ee9233a
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Correct way of encoding RC_DATA frame
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2017-09-27 22:16:15 +02:00 |
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Pawel Spychalski (DzikuVx)
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6f375eafb6
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QSP protocol implementation
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2017-09-23 20:44:27 +02:00 |
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