Pawel Spychalski (DzikuVx)
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50e297b3d6
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Packet reading is now down in single SPI transaction
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2017-12-14 23:41:14 +01:00 |
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Pawel Spychalski
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8ffaccbd5f
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TX power moved to configuration
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2017-11-23 14:41:11 +01:00 |
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Pawel Spychalski (DzikuVx)
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36dc76db0d
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Reworked radio handling to early reject false packets
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2017-11-15 18:53:31 +01:00 |
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Pawel Spychalski (DzikuVx)
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6082f7f4a7
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task priority changed
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2017-11-11 14:09:14 +01:00 |
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Pawel Spychalski (DzikuVx)
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1a031aba3f
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Fixed bug thata was failing to process frames without preamble
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2017-11-09 19:52:52 +01:00 |
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Pawel Spychalski (DzikuVx)
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a800031b0a
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close #15
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2017-10-26 13:51:34 +02:00 |
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Pawel Spychalski (DzikuVx)
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471e532c5a
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close #16
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2017-10-23 12:45:25 +02:00 |
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Pawel Spychalski (DzikuVx)
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810abc14eb
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Fixed SPI mode with LoRa32u4 II
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2017-10-20 22:47:46 +02:00 |
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Pawel Spychalski (DzikuVx)
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5b5ca9fedf
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methods to read RSSI and SNR
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2017-10-07 12:10:15 +02:00 |
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Pawel Spychalski
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3395587580
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Defines refactoring
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2017-10-06 13:47:42 +02:00 |
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Pawel Spychalski (DzikuVx)
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4bc7668ae9
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Support for SPI connected SX1278
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2017-09-30 18:43:03 +02:00 |
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Pawel Spychalski
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2559bd8bc2
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some more work
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2017-09-28 13:17:01 +02:00 |
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Pawel Spychalski (DzikuVx)
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458ee9233a
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Correct way of encoding RC_DATA frame
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2017-09-27 22:16:15 +02:00 |
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Pawel Spychalski (DzikuVx)
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6f375eafb6
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QSP protocol implementation
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2017-09-23 20:44:27 +02:00 |
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